Introduction, Instruction Set Architecture, and Microcode
This lecture will give you a broad overview of the course, as well as the description of architecture, micro-architecture and instruction set architectures.
This lecture covers the basic concept of pipeline and two different types of hazards.
This lecture covers control hazards and the motivation for caches.
This lecture covers cache characteristics and basic superscalar architecture.
Superscalar 2 & Exceptions
This lecture covers the common issues for superscalar architecture.
This lecture covers different kinds of architectures for out-of-order processors.
This lecture covers the common methods used to improve the performance of out-of-order processors including register renaming and memory disambiguation.
This lecture covers the basic concept of very long instruction word (VLIW) processors.
This lecture covers the common methods used to improve VLIW performance.
This lecture covers the motivation and implementation of branch predictors.
Advanced Caches 1
This lecture covers the advanced mechanisms used to improve cache performance.
Advanced Caches 2
This lecture covers more advanced mechanisms used to improve cache performance.
This lecture covers memory management and protection.
Vector Processors and GPUs
This lecture covers the vector processor and optimizations for vector processors.
This lecture covers different types of multithreading.
Parallel Programming 1
This lecture covers the concepts of parallelism, consistency models, and basic parallel programming techniques.
Parallel Programming 2
This lecture covers the solutions for the consistency problem in parallel programming.
This lecture covers the implementation of small multiprocessors.
Multiprocessor Interconnect 1
This lecture covers the design of interconnects for a multiprocessor.
Multiprocessor Interconnect 2
This lecture covers the design of interconnects for multiprocessor and network topology.
Large Multiprocessors (Directory Protocols)
This lecture covers the motivation and implementation of directory protocol used for coherence on large multiproccesors.